电脑键盘工作原理
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总线空闲时，两条线都是高电平(集电极开路)。
This is the only state where the keyboard/mouse is allowed begin transmitting data.
在这种状态下，键盘/鼠标才允许开始传输数据。
The host has ultimate control over the bus and may inhibit communication at any time by pulling the Clock line low.
主机对总线有最高的控制权，在任何时候通过将时钟线拉低就可以禁止通信。
The device always generates the clock signal.
时钟信号总是由设备端生成的。
If the host wants to send data, it must first inhibit communication from the device by pulling Clock low.
如果主机想发送数据，它必须先将时钟拉低来禁止来自设备端的通信。
The host then pulls Data low and releases Clock.
然后主机再拉低数据线，释放时钟。 注释:释放时钟，就是再恢复时钟为高
This is the "Request-to-Send" state and signals the device to start generating clock pulses.
这就是"请求发送(Request-to-Send)"状态，提示 设备端 开始生成时钟信号。
Summary: Bus States
Data = high, Clock = high: Idle state.
Data = high, Clock = low: Communication Inhibited.
Data = low, Clock = high: Host Request-to-Send
总结:总线状态
数据 0 1
0 ---------通信禁止-----------
时钟
1 主机要求发送 总线空闲
The clock and data pins are bidirectional, open-collector
signals that are pulled to 5 V by pullup resistors in the keyboard.
时钟和数据 引脚时 双向 集电极开路的信号，可以被键盘内部的上拉电阻 拉高到5V
Data sent from the device to the host is read on the falling edge of the clock signal; data sent from the host to the device is read on the rising edge.
从设备发送给主机的数据时在时钟信号的下降沿读取的;从主机发给设备的数据是在上升沿读取的。
The clock frequency must be in the range 10 - 16.7 kHz. This means clock must be high for 30 - 50 microseconds and low for 30 - 50 microseconds..
时钟频率必须在10-16.7KHz之间。这意味着时钟必须是 高电平持续30～50毫秒，低电平持续
30～50毫秒。
If you're designing a keyboard, mouse, or host emulator, you should modify/sample the Data line in the middle of each cell. I.e. 15 - 25 microseconds after the appropriate clock transition.
如果你设计一个键盘 鼠标 或者 主机模拟器，你必须 在每个单元的中间时刻 （也就是,在时钟跳变之后的15～25毫秒后） 修改/取样数据线.
Again, the keyboard/mouse always generates the clock signal, but the host always has ultimate control over communication.
重复一遍，键盘/鼠标 总是 生成时钟信号， 而 主机 控制着整个通信过程。
Timing is absolutely crucial. Every time quantity I give in this article must be followed exactly.
时序是非常重要的。在本文中给出的时间数必须严格遵循。
设备发送数据到主机
The Data and Clock lines are both open collector.
数据和时钟线都是集电极开路的。
A resistor is connected between each line and +5V, so the idle state of the bus is high.
在+5V 和每根线 之间连接着一个电阻，所以 总线的空闲状态 是 高电平。
When the keyboard or mouse wants to send information, it first checks the Clock line to make sure it's at a high logic level.
当键盘或者鼠标想发送数据时，它首先必须检查时钟线 ，确认它处于高电平。
If it's not, the host is inhibiting communication and the device must buffer any to-be-sent data until the host releases Clock.
如果不是，主机禁止通信，设备必须缓冲任何要发送的数据，直到主机释放时钟。
The Clock line must be continuously high for at least 50 microseconds before the device can begin to transmit its data.
在设备开始传输数据之前，时钟线 必须持续为 高电平的 时间 必须 至少50ms
The keyboard/mouse writes a bit on the Data line when Clock is high, and it is read by the host when Clock is low.
当时钟为高电平时，键盘/鼠标写一个bit到数据线上；当时钟为低电平时，主机从数据线上读取这个bit 。
The Data line changes state when Clock is high and that data is valid when Clock is low.
当时钟位高时，数据线 改变状态；
当时钟位低时，（数据线上的)数据是有效的。
The clock frequency is 10-16.7 kHz.
时钟频率是10-16.7KHz
The time from the rising edge of a clock pulse to a Data transition must be at least 5 microseconds.
从时钟脉冲的上升沿到数据跳变 的时间必须至少 5ms
The time from a data transition to the falling edge of a clock pulse must be at least 5 microseconds and no greater than 25 microseconds.
从数据跳变 到时钟脉冲的下降沿 必须 至少5ms,且不超过25ms
The host may inhibit communication at any time by pulling the Clock line low for at least 100 microseconds.
主机可在任何时间禁止通信，只需要将时钟线下拉位低电平超过100ms即可
If a transmission is inhibited before the 11th clock pulse, the device must abort the current transmission and prepare to retransmit the current "chunk" of data when host releases Clock.
如果在第11个脉冲时禁止传输，设备必须中止当前的传输，准备重新传输当前的数据"chunk（块)"当主机释放时钟时
A "chunk" of data could be a make code, break code, device ID, mouse movement packet, etc.
一个数据块可能时 通码，断码，设备ID，鼠标移动包 等等。
For example, if a keyboard is interrupted while sending the second byte of a two-byte break code, it will need to retransmit both bytes of that break code, not just the one that was interrupted.
举个例子，如果当发送 一个两字节断码的 第2个字节时，键盘被中断，它将需要重新发送
此断码的两个字节，而不仅仅时被中断掉的那个字节。
If the host pulls clock low before the first high-to-low clock transition, or after the falling edge of the last clock pulse, the keyboard/mouse does not need to retransmit any data.
如果在第一个 高->低 时钟跳变 时，（或者在 最后一个时钟脉冲的下降沿 之后）主机将时钟拉低，键盘/鼠标 不必重新传输任何数据。
However, if new data is created that needs to be transmitted, it will have to be buffered until the host releases Clock.
但是，如果新产生的数据需要传输，它必须将数据缓冲，知道主机释放时钟。
Keyboards have a 16-byte buffer for this purpose. If more than 16 bytes worth of keystrokes occur, further keystrokes will be ignored until there's room in the buffer.
键盘有一个16字节的缓冲区。如果有超过16个字节的击键存在，更多的击键将被忽略。直到
缓冲区有空地。
Mice only store the most current movement packet for transmission.
鼠标只能缓冲最近的一个要传输的（移动)数据包。
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Time to auxiliary device inhibit after clock 11 to ensure the auxiliary device does not start another transmission
The auxiliary device checks the 'clock' l
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