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带有饱和处理功能的并行乘加单元设计

作者：■ 东南大学国家专用集成电路工程中心贾俊波杨军吴艳陆生礼时间：2004-12-13 来源：电子设计应用2004年第11期

摘要：本文介绍了一种48bit+24bit

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关键词： booth算法 Wallace tree 饱和处理 饱和检测

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