如何使用STATECAD进行多状态机设计实例分析
Next_sreg=M0full;
Next_sreg1=M0empty;
IF ( RESET=''1'' ) THEN
Next_sreg=STATE0;
BP_dcounter = (Std_logic_vector''("00"));
ELSE
CASE Sreg IS
WHEN M0full =>
Next_sreg=M0writewait;
BP_dcounter = (( Std_logic_vector''(BP_dcounter1, BP_dcounter0)));
WHEN M0writewait =>
IF ( (Sreg1=M0empty)) THEN
Next_sreg=Write0;
BP_dcounter = (( Std_logic_vector''(BP_dcounter1, BP_dcounter0)) + Std_logic_vector''("01"));
ELSE
Next_sreg=M0writewait;
BP_dcounter = (( Std_logic_vector''(BP_dcounter1, BP_dcounter0)));
END IF;
WHEN STATE0 =>
Next_sreg=Write0;
BP_dcounter = (( Std_logic_vector''(BP_dcounter1, BP_dcounter0)) +
Std_logic_vector''("01"));
WHEN Write0 =>
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